Conventional bi-phased encoders 10, for example, as shown in FIG. 1, encode input signals such as data 21 and a clock signal 22 and provide an output signal 24, as shown in FIG. 2. The bi-phased encoder 10, as shown in FIG. 1, includes a flip-flop 11, an inverter 12, and an exclusive OR gate 13. Generally, the output signal 23 provided by the flip-flop 11 includes glitches 26. Moreover, the conventional bi-phased encoders 10 provide output signals 24 having glitches 25. For example, conventional bi-phased encoders 10 implemented to transfer clock information and data information on one line across a high voltage interface generate glitches 25 along with the output signal 24. The glitches 25 are created by the encoders 10 during data transitions between a high state and low state, as shown in FIG. 2. Accordingly, the respective decoders decode the signals improperly and provide erroneous data.
Although utilizing conventional bi-phased encoders to encode signals has generally been accepted, such encoders are prone to providing output signals having glitches and are not suitable for applications requiring high accuracy and reliability.